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chjara 六七 
chjara@akko.tuxcrafting.xyz
Huh, according to lstopo my processor's E-cores have more L1i (64 KiB) than the P-cores (32 KiB).
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@chjara cache improves power efficiency ig, still weird. Maybe intel expects stuff that runs on e-cores to have not so tight loops?
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chjara 六七
chjara@akko.tuxcrafting.xyz
@snacks Eh, you're not keeping more than one task at a time in L1. I think it's probably just because they couldn't fit 64 KiB in the P-cores' throughput/latency requirements, but they could for the E-cores.
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